1. Field of the Invention
This invention relates to a silicon carbide field-effect transistor and more particularly to a silicon carbide field-effect transistor having source and drain regions in a silicon carbide layer, at least one of the source and drain regions being formed by the use of a Schottky contact on the silicon carbide layer.
2. Description of the Prior Art
Silicon carbide (SiC) is a semiconductor material with a wide band gap of 2.3 to 3.3 electronvolts (eV), which is thermally, chemically and mechanically quite stable, and also has a great resistance to radiation damage. Furthermore, the saturation drift velocity of electrons in silicon carbide is greater than that in silicon (Si) and other semiconductor materials. The use of semiconductor devices made of conventional semiconductor materials such as silicon is difficult under severe conditions of high temperature, high output drive, high frequency operation, and radiation exposure. Therefore, semiconductor devices using silicon carbide are expected to have wide applications for devices which are used under such conditions.
Despite these many advantages and capabilities, a silicon carbide semiconductor device has not yet been put into actual use, because the technique still remains to be established for growing high quality silicon carbide single crystals having a large surface area with good reproducibility required for the commercial production thereof.
In recent years, there has been developed a process for growing large-sized high-quality single crystals of silicon carbide on a single-crystal substrate of silicon by the chemical vapor deposition (CVD) technique (e.g., Japanese Laid-Open Patent Publication No. 59-203799). This technique makes it possible to control the conductivity type, the impurity concentration, or the like of silicon carbide single crystals obtained by adding an appropriate amount of impurities during the growth of the single crystals. Therefore, this technique makes many contributions to the development of various semiconductor devices by the use of silicon carbide single crystals. Examples of the silicon carbide semiconductor devices include an inversion-mode metal-oxide-semiconductor field-effect transistor (MOSFET) fabricated on a silicon carbide layer which functions as a channel-formation layer. As used herein, the term channel-formation layer refers to a semiconductor layer in which a channel region will be formed in the on state of the transistor.
In general, for the purpose of producing an inversion-mode MOSFET, a channel-formation layer should be formed in a semiconductor substrate or semiconductor layer grown thereon. The channel-formation layer should also be provided with source and drain regions of the opposite conductivity type thereto. In other words, when an inversion-mode n-channel MOSFET is fabricated with the use of a p-type channel-formation layer, the source and drain regions of the n-type must be formed in the p-type channel-formation layer. When an inversion-mode p-channel MOSFET is fabricated with the use of an n-type channel-formation layer, the source and drain regions of the p-type must be formed in the n-type channel-formation layer. In order that these MOSFETs may exhibit satisfactory device characteristics, the source and drain regions are required to satisfy the following two conditions. First, pn junctions between the source region and the channel-formation layer and between the drain region and the channel-formation layer should have excellent characteristics to reduce leakage current. Second, the electrical resistivity of the source and drain regions as well as the contact resistance between these regions and the wiring metal should be sufficiently small to reduce the on-state resistance of the transistor.
Usually, the source and drain regions are formed in the channel-formation layer by ion implantation or thermal diffusion of impurities. These methods are available for the production of silicon semiconductor devices with a channel-formation layer made of silicon and they have already been established as a device process technique. By contrast, in the case of silicon carbide semiconductor devices with a channel-formation layer made of silicon carbide, the above-mentioned methods are not available for the following reasons. The thermal diffusion method requires a high diffusion temperature of 1600.degree. C. or more, because of small diffusion coefficient of impurities in silicon carbide. Therefore, the control of impurity concentration in the silicon carbide layer is difficult and moreover, the semiconductor substrate and the channel-formation layer may deteriorate. On the other hand, the ion implantation method has the disadvantages in that impurities implanted in the silicon carbide layer are relatively stable and the amount of impurities ionized in the silicon carbide layer is small. Therefore, the electrical resistivity of the source and drain regions formed in the channel-formation layer cannot sufficiently be decreased. Moreover, the ion implantation method has the disadvantages in that pn junctions with satisfactory excellent characteristics cannot be obtained. Therefore, silicon carbide MOSFETs, which have been recently developed, cannot be used for practical applications because of large leakage current and large on-state resistance.